1. Field of the Invention
The present invention relates to a semiconductor device fabrication process, particularly for semiconductor devices having a patternwise oxidized film (field oxide film) formed by LOCOS (Local Oxidation of Silicon) technique used for isolation of circuit elements.
2. Description of the Prior Art
The LOCOS has hitherto been widely applied to the fabrication of semiconductor IC (Integrated Circuit) as a technique of isolating circuit elements assembled thereon. This technique oxidizes the surface of semiconductor substrate in such a manner that a selected pattern of field SiO.sub.2 film may be formed to isolate circuit element regions.
Namely, as shown in FIG. 1(A), first, a principal surface of a semiconductor substrate 1 (silicon wafer) is oxidized by heating to grow a SiO.sub.2 film 2, on which a Si.sub.3 N.sub.4 film 3 is further formed by CVD (Chemical Vapor Deposition).
Further, as shown in FIG. 1(B), with a given pattern of photoresist (not shown) applied for masking, the above SiO.sub.2 film 2 and Si.sub.3 N.sub.4 film 3 are patternwise dry etched in overlapping positions to form wells 4. The exposed surfaces of semiconductor substrate at the bottom of these wells 4 are then bombarded with a boron ion beam 5 (under masking with the photoresist) for injection of channel stopper boron ions to form a boron doped layer 6.
After the remaining photoresist is removed, heating for a prolonged duration of time selectively oxidizes the exposed surfaces of substrate 1 at the bottom of wells 4 to form a field SiO.sub.2 film 7, as shown in FIG. 1(C) for isolation of circuit elements.
The above isolation of circuit elements by LOCOS, which is a generally adopted technique, forms a SiO.sub.2 film 7 with bird's beaks 8. These bird's beaks inevitably widen the film sideways leading to a field SiO.sub.2 film 7 having a width W2 larger than needed as compared to the design width. As a result, narrower areas are available for fabrication of circuit elements. In designing, therefore, it is necessary to assign wider areas for circuit elements in consideration of the above bird's beaks 8. As circuit elements are more and more integrated for a higher density, this poses a severe difficulty in microminiaturization. For example, in case circuit elements are fabricated as memory cells, the effective cell area is reduced because of the above reason. Accordingly, to increase the cell capacity, it is often necessary to adopt a special approach, such as use of a thinner gate oxide film or adoption of the vertical capacitor technology.
On the other hand, the SWAMI (Side Wall Masked Isolation), etc. has been proposed as the technique for circuit element isolation that does not form any bird's beak 8. All these approaches are however very inferior in cost and yield because the process is composed of much more process steps as compared to the LOCOS (actually, the SWAMI requires at least six more steps) and because the process is more complicated. Further, with the SWAMI, the Si.sub.3 N.sub.4 film that provides the side wall for oxidation resistant masking is rarely formed at good dimensional reproducibility (particularly in width) without using an additional number of process steps.